Pulling the limits of NANOCmos electronics

Project within 6 PR-PULLNANO

Aim of project: The basic aim is to demonstrate the possibili­ty of fabrication of CMOS integrated circuits of the genera­tions 32 nm and 22 nm and to introduce Europe into the era of nanoelectronics.

Expected results: Development of theoretical quantum-mechani­cal models of transport of electrons along the channel of MOS/SOI transistors and tunneling through high-K gate stacks.